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Thanks sir... From Pakistan...🙂

Thanks alot for your effort...

Thanks alot sir...

which is the source for question bank

Keep making videos sir ! We make a good use if it

I love you. Literally a lifesaver

Great 👍

sir y dont care condition not used

thanks

part b ap ny wrong kia hy.

god bless you

does anybody teach these that speak american english?

Thank you so much

Did not understand anything 😭😞

can anyone tell the edition of this textbook

F2 Circuit is wrong

where is the rest of the question sir? there are b and c options int the book :((( i wish, you have solved them

Thanks sir

18.41 There is 4 term. 4th is A'xy. Good Luck everyone!

Very good! Simple and clear

sir is this output of flipflop

I think often the sometimes is abused. The 74138 is actually a decoder/demultiplexer, yet it often seems to be referred to as a multiplexer which it is not.

Thank you so much, it was very helpful

use multiplexer dude.. also new data is transferred only when s = 0, l = 1.. why did you put don't care in shifts?!

Thanks abunch

سلمك خرف م فهمت حاجه لكن اقل شي حصل حل الهوم وورك ❤

Sir if you can't answer people's questions then please don't upload a video people kept on asking about essentials and you are not responding what kind of behaviour is that you are our teacher I respect you but that is not the way

THANK YOU!

THIS VIDEO IS NOT CLEAR . VERY CONFUSING.

In the second case after 1101 i am getting 0110 i think you write it wrong

thank you sir

Great explanation but little bit confusion about. k maps

thank you sir شكرا جزیلا لك بسیار از شما ممنونم

Thank you very much If I want to display segment 1 should I connect circuits b and c with AND gate? Please answer😢

it's realy helpful thank u!!!

You just saved my finals paper of DLD!! Kudos💝

when converting in excess 3 from BCD why subtracting 3 instead of adding 3?

역시 공학은 인도인..

Sir thanks you for your help , you are the best teacher who help me in hard time , big respect from Pakistan ❤, love you sir

Really helpful😊

Draw it's logic diagram of pn ff and d ff then convert

Okkk😂

Z = B, isn't it? But why we use Z= A?

Thank you so much Dr.

Instead of each digital system having their own clock generator, it would be nice to be able to share the clock generators.

for 4,5,6 and 7 the output is three less than the input but you are writing two less than the input is my book is wrong

Thanks sir 👍🏾

Thank you DR. I really mean it! God bless you

the hdl gate level diagram is wrong as your are coverting excess 3 instead of grey code